Characterization of diode-connected heterojunction bipolar transistors for near-infrared detecting applications
- Venter, Johan, Sinha, Saurabh, Lambrechts, Wynand
- Authors: Venter, Johan , Sinha, Saurabh , Lambrechts, Wynand
- Date: 2018
- Subjects: Heterojunction bipolar transistor , Infrared radiation photodetectors , Circuit noise
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/289227 , uj:31377 , Citation: Johan Venter, Saurabh Sinha, Wynand Lambrechts, “Characterization of diode-connected heterojunction bipolar transistors for near-infrared detecting applications,” Opt. Eng. 57(11), 117104 (2018), doi: 10.1117/1.OE.57.11.117104.
- Description: Abstract: Please refer to full text to view abstract.
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- Authors: Venter, Johan , Sinha, Saurabh , Lambrechts, Wynand
- Date: 2018
- Subjects: Heterojunction bipolar transistor , Infrared radiation photodetectors , Circuit noise
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/289227 , uj:31377 , Citation: Johan Venter, Saurabh Sinha, Wynand Lambrechts, “Characterization of diode-connected heterojunction bipolar transistors for near-infrared detecting applications,” Opt. Eng. 57(11), 117104 (2018), doi: 10.1117/1.OE.57.11.117104.
- Description: Abstract: Please refer to full text to view abstract.
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A survey of current trends in master’s programs in microelectronics
- Božanić, Mladen, Sinha, Saurabh
- Authors: Božanić, Mladen , Sinha, Saurabh
- Date: 2018
- Subjects: Master’s students , Graduate education , Engineering curriculum
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/270276 , uj:28725 , Citation: Božanić, M. & Sinha, S. 2018. A survey of current trends in master’s programs in microelectronics. IEEE Transactions on Education, 61(2):151-157. doi: 10.1109/TE.2017.2778697 , ISSN: 0018-9359
- Description: Abstract: This study brings forward a paradigm shift in microelectronic and nanoelectronic engineering education. Background: An increasing number of universities are offering graduate electrical engineering degrees with multi-disciplinary Master’s level specialization in microelectronics or nanoelectronics. The paradigm shift from electrical engineering to microelectronics graduate education, in the past, has been slow but nowadays, when the technology has advanced to a degree where industry is relying on cyber-physical connectivity, there is an opportunity for engineering education to utilize such availability...
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- Authors: Božanić, Mladen , Sinha, Saurabh
- Date: 2018
- Subjects: Master’s students , Graduate education , Engineering curriculum
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/270276 , uj:28725 , Citation: Božanić, M. & Sinha, S. 2018. A survey of current trends in master’s programs in microelectronics. IEEE Transactions on Education, 61(2):151-157. doi: 10.1109/TE.2017.2778697 , ISSN: 0018-9359
- Description: Abstract: This study brings forward a paradigm shift in microelectronic and nanoelectronic engineering education. Background: An increasing number of universities are offering graduate electrical engineering degrees with multi-disciplinary Master’s level specialization in microelectronics or nanoelectronics. The paradigm shift from electrical engineering to microelectronics graduate education, in the past, has been slow but nowadays, when the technology has advanced to a degree where industry is relying on cyber-physical connectivity, there is an opportunity for engineering education to utilize such availability...
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Designing linear PAs at mm-wave frequencies using volterra series analysis
- Valliarampath, Joe. T., Sinha, Saurabh
- Authors: Valliarampath, Joe. T. , Sinha, Saurabh
- Date: 2015
- Subjects: Volterra series analysis , Power amplifiers , Millimeter wave frequencies , Bipolar transistors , Adaptive predistortion
- Language: English
- Type: Article
- Identifier: http://ujcontent.uj.ac.za8080/10210/385688 , http://hdl.handle.net/10210/15400 , uj:15656 , DOI: 10.1109/CJECE.2015.2434941 , Citation: Valliarampath, J.T. & Sinha, S. 2015. Designing linear PAs at millimeter-wave frequencies using volterra series analysis. Canadian Journal of Electrical and Computer Engineering, 38(3):232-237. DOI: 10.1109/CJECE.2015.2434941
- Description: Abstract: Power amplifiers (PAs) at millimeter-wave (mm-wave) frequencies are required for delivering high output linear power while being efficient, however, their performance is severely affected by the scaled semiconductor technology and the operating frequency. To improve the linearity of mm-wave PAs, it is recommended that an external linearization technique such as predistortion be used. The PA presented in this paper uses adaptive predistortion (APD). The APD linearization technique was developed using the Volterra series analysis on the silicon-germanium (SiGe) heterojunction bipolar transistor. The Volterra series analysis was used to identify and characterize the third-order intermodulation distortion components. The PA uses a single-ended common-emitter topology. It consists of three stages biased in the Class AB mode. The PA and APD were designed using the 130 nm SiGe bipolar and complementary metal oxide semiconductor process. The PA and APD achieve an optimum third-order intermodulation reduction of 10 dB and an improved linear output power of 2.5 dBm.
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- Authors: Valliarampath, Joe. T. , Sinha, Saurabh
- Date: 2015
- Subjects: Volterra series analysis , Power amplifiers , Millimeter wave frequencies , Bipolar transistors , Adaptive predistortion
- Language: English
- Type: Article
- Identifier: http://ujcontent.uj.ac.za8080/10210/385688 , http://hdl.handle.net/10210/15400 , uj:15656 , DOI: 10.1109/CJECE.2015.2434941 , Citation: Valliarampath, J.T. & Sinha, S. 2015. Designing linear PAs at millimeter-wave frequencies using volterra series analysis. Canadian Journal of Electrical and Computer Engineering, 38(3):232-237. DOI: 10.1109/CJECE.2015.2434941
- Description: Abstract: Power amplifiers (PAs) at millimeter-wave (mm-wave) frequencies are required for delivering high output linear power while being efficient, however, their performance is severely affected by the scaled semiconductor technology and the operating frequency. To improve the linearity of mm-wave PAs, it is recommended that an external linearization technique such as predistortion be used. The PA presented in this paper uses adaptive predistortion (APD). The APD linearization technique was developed using the Volterra series analysis on the silicon-germanium (SiGe) heterojunction bipolar transistor. The Volterra series analysis was used to identify and characterize the third-order intermodulation distortion components. The PA uses a single-ended common-emitter topology. It consists of three stages biased in the Class AB mode. The PA and APD were designed using the 130 nm SiGe bipolar and complementary metal oxide semiconductor process. The PA and APD achieve an optimum third-order intermodulation reduction of 10 dB and an improved linear output power of 2.5 dBm.
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Noise reduction by pixel circuit optimization in 4-T pixel structure detectors using integrated circuit technologies
- Venter, Johan, Sinha, Saurabh
- Authors: Venter, Johan , Sinha, Saurabh
- Date: 2015
- Subjects: CMOS technology , Active pixel sensors , Threshold voltage
- Language: English
- Type: Conference proceedings
- Identifier: http://hdl.handle.net/10210/15236 , uj:15636 , ISBN:9781479974733 , Citation: Venter, J. & Sinha, S. 2015. Noise reduction by pixel circuit optimization in 4-T pixel structure detectors using integrated circuit technologies. IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS 2015), 2 - 4 November 2015, Tel Aviv, Israel
- Description: Abstract: The most commonly used pixel structure in integrated circuit technologies is the three-transistor pixel structure (3-T). This structure consists of a pixel, a reset transistor, a source follower and a pixel select transistor. An extension to this is the 4-T pixel structure where an extra transistor is included to enable current steering in the readout phase and reset phase. This greatly reduces current consumption compared to the conventional 3-T pixel structure. Simulation results depicting this optimization is provided to support the technical contribution of this paper.
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- Authors: Venter, Johan , Sinha, Saurabh
- Date: 2015
- Subjects: CMOS technology , Active pixel sensors , Threshold voltage
- Language: English
- Type: Conference proceedings
- Identifier: http://hdl.handle.net/10210/15236 , uj:15636 , ISBN:9781479974733 , Citation: Venter, J. & Sinha, S. 2015. Noise reduction by pixel circuit optimization in 4-T pixel structure detectors using integrated circuit technologies. IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS 2015), 2 - 4 November 2015, Tel Aviv, Israel
- Description: Abstract: The most commonly used pixel structure in integrated circuit technologies is the three-transistor pixel structure (3-T). This structure consists of a pixel, a reset transistor, a source follower and a pixel select transistor. An extension to this is the 4-T pixel structure where an extra transistor is included to enable current steering in the readout phase and reset phase. This greatly reduces current consumption compared to the conventional 3-T pixel structure. Simulation results depicting this optimization is provided to support the technical contribution of this paper.
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RF IC performance optimization by synthesizing optimum inductors
- Božanić, Mladen, Sinha, Saurabh
- Authors: Božanić, Mladen , Sinha, Saurabh
- Date: 2015
- Subjects: Optimal system design , Optimum inductors , Radio frequency
- Type: Book chapter
- Identifier: uj:5223 , ISBN 978-3-319-19871-2 , http://hdl.handle.net/10210/14509
- Description: Even with optimal system design and careful choice of topology for a particular RF application, large amounts of energy are often wasted due to low-quality passives, especially inductors. Inductors have traditionally been difficult to integrate due to their inherent low quality factors and modelling complexity. Furthermore, although many different inductor configurations are available for an RF designer to explore, support for integrated inductors in electronic design automation tools and process design kits has been very limited in the past. In this chapter, a recent advance in technology-aware integrated inductor design is presented, where drawbacks of the integrated inductor design are addressed by introducing an equation-based inductor synthesis algorithm. The intelligent computation technique aims to allow RF designers to optimize integrated inductors, given the inductor center frequency dictated by the device application, and geometry constraints. This does not only lay down a foundation for system-level RF circuit performance optimization, but, because inductors are often the largest parts of an RF system, it also allows for optimal usage of chip real estate.
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- Authors: Božanić, Mladen , Sinha, Saurabh
- Date: 2015
- Subjects: Optimal system design , Optimum inductors , Radio frequency
- Type: Book chapter
- Identifier: uj:5223 , ISBN 978-3-319-19871-2 , http://hdl.handle.net/10210/14509
- Description: Even with optimal system design and careful choice of topology for a particular RF application, large amounts of energy are often wasted due to low-quality passives, especially inductors. Inductors have traditionally been difficult to integrate due to their inherent low quality factors and modelling complexity. Furthermore, although many different inductor configurations are available for an RF designer to explore, support for integrated inductors in electronic design automation tools and process design kits has been very limited in the past. In this chapter, a recent advance in technology-aware integrated inductor design is presented, where drawbacks of the integrated inductor design are addressed by introducing an equation-based inductor synthesis algorithm. The intelligent computation technique aims to allow RF designers to optimize integrated inductors, given the inductor center frequency dictated by the device application, and geometry constraints. This does not only lay down a foundation for system-level RF circuit performance optimization, but, because inductors are often the largest parts of an RF system, it also allows for optimal usage of chip real estate.
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Entrepreneurship as an IEEE workforce development theme
- Stander, Tinus, Sinha, Saurabh
- Authors: Stander, Tinus , Sinha, Saurabh
- Date: 2013
- Subjects: Workforce development , Entrepreneurship
- Type: Article
- Identifier: uj:4720 , ISSN 978-1-4799-2402-8 , http://hdl.handle.net/10210/11371
- Description: The IEEE is currently planning an extensive workforce development (WFD) programme through its volunteer and associated networks. Together with environmental scans, potential learning areas and contributing partners are being solicited. The Institute of Physics has an established workshop in Entrepreneurship for Scientists and Engineers, which may partially fulfil this role. This paper describes the format and content of this workshop, constructively evaluating it keeping in mind metrics relating to WFD. Future value-adds for IEEE involvement are identified.
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- Authors: Stander, Tinus , Sinha, Saurabh
- Date: 2013
- Subjects: Workforce development , Entrepreneurship
- Type: Article
- Identifier: uj:4720 , ISSN 978-1-4799-2402-8 , http://hdl.handle.net/10210/11371
- Description: The IEEE is currently planning an extensive workforce development (WFD) programme through its volunteer and associated networks. Together with environmental scans, potential learning areas and contributing partners are being solicited. The Institute of Physics has an established workshop in Entrepreneurship for Scientists and Engineers, which may partially fulfil this role. This paper describes the format and content of this workshop, constructively evaluating it keeping in mind metrics relating to WFD. Future value-adds for IEEE involvement are identified.
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An EPICS-in-IEEE initiative: learners of St Alban’s college and students of the University of Pretoria seek earth observation solutions through air-quality microsensing
- Sinha, Saurabh, Bebwele, Phumudzo R., Mouton, Chris
- Authors: Sinha, Saurabh , Bebwele, Phumudzo R. , Mouton, Chris
- Date: 2013
- Subjects: Wireless sensor nodes , Sensor sink , Data terminal , Google cloud
- Type: Article
- Identifier: uj:4719 , ISSN 978-1-4799-2402-8 , http://hdl.handle.net/10210/11370
- Description: This paper describes the design and implementation of a microsensor-based air-quality monitoring system intended for earth observations. Traditionally, air-quality monitoring systems are limited to centralized or static sites and thus obtain a limited amount of data for estimation of hazardous air pollutants. The system in this paper was designed to improve the shortcomings experienced by traditional air-quality monitoring systems. The system uses the wireless sensor network (WSNs) nodes to sense and transmit selected ambient air-quality parameters to a sensor sink, which relays these parameters to a data terminal where final data processing is completed and the user interface is situated. The project development team that was involved in the design comprised a senior undergraduate student at the University of Pretoria and a group of eight grade-11 secondary-school learners from St Alban's College, a boys’ high school situated in Pretoria, South Africa. While the undergraduate final-year student designed an analogous system by first principles, the secondary-school learners used educational air-quality microsensor off-the-shelf components. The learners used an Android-based input/output sensor node to communicate to a mobile phone, which managed the upload to a Google drive folder. As a secondary outcome, the educational air-quality microsensor systems developed through this undertaking would serve as an educational tool for improving the public understanding of air-quality, including a new national airquality act in South Africa. This project was completed as an endeavor of Engineering Projects In Community Service (EPICS) in IEEE.
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- Authors: Sinha, Saurabh , Bebwele, Phumudzo R. , Mouton, Chris
- Date: 2013
- Subjects: Wireless sensor nodes , Sensor sink , Data terminal , Google cloud
- Type: Article
- Identifier: uj:4719 , ISSN 978-1-4799-2402-8 , http://hdl.handle.net/10210/11370
- Description: This paper describes the design and implementation of a microsensor-based air-quality monitoring system intended for earth observations. Traditionally, air-quality monitoring systems are limited to centralized or static sites and thus obtain a limited amount of data for estimation of hazardous air pollutants. The system in this paper was designed to improve the shortcomings experienced by traditional air-quality monitoring systems. The system uses the wireless sensor network (WSNs) nodes to sense and transmit selected ambient air-quality parameters to a sensor sink, which relays these parameters to a data terminal where final data processing is completed and the user interface is situated. The project development team that was involved in the design comprised a senior undergraduate student at the University of Pretoria and a group of eight grade-11 secondary-school learners from St Alban's College, a boys’ high school situated in Pretoria, South Africa. While the undergraduate final-year student designed an analogous system by first principles, the secondary-school learners used educational air-quality microsensor off-the-shelf components. The learners used an Android-based input/output sensor node to communicate to a mobile phone, which managed the upload to a Google drive folder. As a secondary outcome, the educational air-quality microsensor systems developed through this undertaking would serve as an educational tool for improving the public understanding of air-quality, including a new national airquality act in South Africa. This project was completed as an endeavor of Engineering Projects In Community Service (EPICS) in IEEE.
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Extraction of transmission line parameters and effect of conductive substrates on their characteristics
- Chaturvedi, Saurabh, Božanić, Mladen, Sinha, Saurabh
- Authors: Chaturvedi, Saurabh , Božanić, Mladen , Sinha, Saurabh
- Date: 2017
- Subjects: Conductive substrate , Microstrip line , Transmission line (TL) model
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/238570 , uj:24480 , Citation: Chaturvedi, S., Božanić, M. & Sinha, S. 2017. Extraction of transmission line parameters and effect of conductive substrates on their characteristics.
- Description: Abstract: The paper presents the effect of conductive or lossy silicon (Si) substrates on the frequency-dependent distributed series impedance transmission line (TL) parameters, R(ω) and L(ω). The frequency variations of these parameters of the microstrip line for four different conductivities of Si substrate are observed and compared. Keysight Technologies (formerly Agilent’s Electronic Measurement Group) Advanced Design System is used for the electromagnetic simulations of the microstrip line structures. Scattering parameters (S-parameters) based equations are used to plot the variations of series impedance parameters as a function of frequency. Furthermore, this paper explains a complete method to extract various parameters related to a TL. The work extracts the parameters of a microstrip TL model provided with the GlobalFoundries 0.13 μm SiGe BiCMOS8HP process design kit up to 100 GHz.
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- Authors: Chaturvedi, Saurabh , Božanić, Mladen , Sinha, Saurabh
- Date: 2017
- Subjects: Conductive substrate , Microstrip line , Transmission line (TL) model
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/238570 , uj:24480 , Citation: Chaturvedi, S., Božanić, M. & Sinha, S. 2017. Extraction of transmission line parameters and effect of conductive substrates on their characteristics.
- Description: Abstract: The paper presents the effect of conductive or lossy silicon (Si) substrates on the frequency-dependent distributed series impedance transmission line (TL) parameters, R(ω) and L(ω). The frequency variations of these parameters of the microstrip line for four different conductivities of Si substrate are observed and compared. Keysight Technologies (formerly Agilent’s Electronic Measurement Group) Advanced Design System is used for the electromagnetic simulations of the microstrip line structures. Scattering parameters (S-parameters) based equations are used to plot the variations of series impedance parameters as a function of frequency. Furthermore, this paper explains a complete method to extract various parameters related to a TL. The work extracts the parameters of a microstrip TL model provided with the GlobalFoundries 0.13 μm SiGe BiCMOS8HP process design kit up to 100 GHz.
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Thermal and flicker noise improvement in short-channel CMOS detectors
- Venter, Johan, Sinha, Saurabh
- Authors: Venter, Johan , Sinha, Saurabh
- Date: 2014
- Subjects: CMOS sensors , Detector development , Infrared detectors , Integrated circuits , Near infrared , Sensors , Simulations
- Type: Article
- Identifier: http://ujcontent.uj.ac.za8080/10210/374668 , uj:4735 , ISSN 0277-786X , http://hdl.handle.net/10210/11662
- Description: Integrated circuit (IC) technology has emerged as a suitable platform for infrared (IR) detector development. This technology is however susceptible to on-chip intrinsic noise. By using double-gate MOSFETs for detectors in the near-IR band, noise performance in the readout circuitry is improved, thereby enhancing the overall performance of these detectors. A 1 dB reduction in low-frequency noise is achieved, which is verified through simulations. It is shown that by using short-channel devices that noise improvement is furthermore obtained due to reduction in threshold voltage variation. The double-gate concept is applied in simulation to the three-transistor pixel topology and can also be implemented in other detector topologies such as the four-transistor pixel topology, since readout noise is not limited to specific IR detector topologies. The overall performance of near-IR detectors and the fill factor are significantly improved. © (2014) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
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- Authors: Venter, Johan , Sinha, Saurabh
- Date: 2014
- Subjects: CMOS sensors , Detector development , Infrared detectors , Integrated circuits , Near infrared , Sensors , Simulations
- Type: Article
- Identifier: http://ujcontent.uj.ac.za8080/10210/374668 , uj:4735 , ISSN 0277-786X , http://hdl.handle.net/10210/11662
- Description: Integrated circuit (IC) technology has emerged as a suitable platform for infrared (IR) detector development. This technology is however susceptible to on-chip intrinsic noise. By using double-gate MOSFETs for detectors in the near-IR band, noise performance in the readout circuitry is improved, thereby enhancing the overall performance of these detectors. A 1 dB reduction in low-frequency noise is achieved, which is verified through simulations. It is shown that by using short-channel devices that noise improvement is furthermore obtained due to reduction in threshold voltage variation. The double-gate concept is applied in simulation to the three-transistor pixel topology and can also be implemented in other detector topologies such as the four-transistor pixel topology, since readout noise is not limited to specific IR detector topologies. The overall performance of near-IR detectors and the fill factor are significantly improved. © (2014) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
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A temperature stabilized CMOS VCO
- Sebastian, Johny, Sinha, Saurabh
- Authors: Sebastian, Johny , Sinha, Saurabh
- Date: 2014
- Subjects: Voltage controlled oscillators
- Type: Article
- Identifier: uj:4828 , http://hdl.handle.net/10210/12351
- Description: The established method of frequency drift compensation in voltage controlled oscillators (VCOs) resulting from temperature variance involves modulation of control voltage using a non-linear voltage internally generated. An innovative frequency drift compensation scheme for a VCO, based on amplitude control, is described in this paper. Two peak detectors are used to generate voltages representing positive and negative peaks of the sinusoidal driving an error amplifier. The amplifier output controls the delivery of transconductance accessible to the oscillator, thereby keeping the oscillation amplitude steady. Frequency stability has improved to 16 ppm/ C from an uncompensated value of 189 ppm/ C and is applicable where frequency stability requirements are not stringent, such as HS-USB and S-ATA. The temperature stabilized VCO at 2.4 GHz center frequency is prototyped using CMOS technology from ams AG (formerly austriamicrosystems AG). The result obtained from this study indicates that better frequency stability may be achievable if the traditional compensation scheme is preceded by amplitude control.
- Full Text: false
- Authors: Sebastian, Johny , Sinha, Saurabh
- Date: 2014
- Subjects: Voltage controlled oscillators
- Type: Article
- Identifier: uj:4828 , http://hdl.handle.net/10210/12351
- Description: The established method of frequency drift compensation in voltage controlled oscillators (VCOs) resulting from temperature variance involves modulation of control voltage using a non-linear voltage internally generated. An innovative frequency drift compensation scheme for a VCO, based on amplitude control, is described in this paper. Two peak detectors are used to generate voltages representing positive and negative peaks of the sinusoidal driving an error amplifier. The amplifier output controls the delivery of transconductance accessible to the oscillator, thereby keeping the oscillation amplitude steady. Frequency stability has improved to 16 ppm/ C from an uncompensated value of 189 ppm/ C and is applicable where frequency stability requirements are not stringent, such as HS-USB and S-ATA. The temperature stabilized VCO at 2.4 GHz center frequency is prototyped using CMOS technology from ams AG (formerly austriamicrosystems AG). The result obtained from this study indicates that better frequency stability may be achievable if the traditional compensation scheme is preceded by amplitude control.
- Full Text: false
A 50 GHz SiGe BiCMOS active bandpass filter
- Chaturvedi, Saurabh, Božanić, Mladen, Sinha, Saurabh
- Authors: Chaturvedi, Saurabh , Božanić, Mladen , Sinha, Saurabh
- Date: 2017
- Subjects: Bandpass filter (BPF) , SiGe BiCMOS , Negative resistance
- Language: English
- Type: Conference proceedings
- Identifier: http://hdl.handle.net/10210/238154 , uj:24414 , Citation: Chaturvedi, S., Božanić, M. & Sinha, S. 2017. A 50 GHz SiGe BiCMOS active bandpass filter.
- Description: Abstract: This paper presents a second-order active bandpass filter (BPF) at millimeter-wave frequency band using 0.13 μm SiGe BiCMOS technology. A complementary cross-coupled pair based negative resistance technique is applied to compensate for the resistive losses of microstrip line resonators. The proposed active BPF is simulated using the Keysight Technologies (formerly Agilent’s Electronic Measurement Group) Advanced Design System 2016.01. The center frequency (fc), 3-dB bandwidth, and fractional bandwidth of the simulated BPF are 53.85 GHz, 14.18 GHz, and 26.33%, respectively. The BPF shows an insertion loss (IL) of 0.33 dB and a return loss (RL) of 18.03 dB at fc. The minimum IL of 0.10 dB and best RL of 26.03 dB are observed in the passband. The noise figure and input 1-dB compression point (PldB) at fc are 7.93 dB and -3.67 dBm, respectively. The power dissipation is 2.62 mW at 1.6 V supply voltage. For the input power level of -10 dBm, the power level of the second harmonic is -46.02 dBc.
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- Authors: Chaturvedi, Saurabh , Božanić, Mladen , Sinha, Saurabh
- Date: 2017
- Subjects: Bandpass filter (BPF) , SiGe BiCMOS , Negative resistance
- Language: English
- Type: Conference proceedings
- Identifier: http://hdl.handle.net/10210/238154 , uj:24414 , Citation: Chaturvedi, S., Božanić, M. & Sinha, S. 2017. A 50 GHz SiGe BiCMOS active bandpass filter.
- Description: Abstract: This paper presents a second-order active bandpass filter (BPF) at millimeter-wave frequency band using 0.13 μm SiGe BiCMOS technology. A complementary cross-coupled pair based negative resistance technique is applied to compensate for the resistive losses of microstrip line resonators. The proposed active BPF is simulated using the Keysight Technologies (formerly Agilent’s Electronic Measurement Group) Advanced Design System 2016.01. The center frequency (fc), 3-dB bandwidth, and fractional bandwidth of the simulated BPF are 53.85 GHz, 14.18 GHz, and 26.33%, respectively. The BPF shows an insertion loss (IL) of 0.33 dB and a return loss (RL) of 18.03 dB at fc. The minimum IL of 0.10 dB and best RL of 26.03 dB are observed in the passband. The noise figure and input 1-dB compression point (PldB) at fc are 7.93 dB and -3.67 dBm, respectively. The power dissipation is 2.62 mW at 1.6 V supply voltage. For the input power level of -10 dBm, the power level of the second harmonic is -46.02 dBc.
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Re-inventing postgraduate level teaching and learning in nanoelectronics
- Božanić, Mladen, Chaturvedi, Saurabh, Sinha, Saurabh
- Authors: Božanić, Mladen , Chaturvedi, Saurabh , Sinha, Saurabh
- Date: 2017
- Subjects: Nanoelectronics , Continuing education , Blackboard Learn platform
- Language: English
- Type: Conference proceedings
- Identifier: http://hdl.handle.net/10210/241998 , uj:24949 , Citation: Božanić, M., Chaturvedi, S. & Sinha, S. 2017. Re-inventing postgraduate level teaching and learning in nanoelectronics.
- Description: Abstract: In the world where technology changes almost daily, the field of microelectronics or nanoelectronics is becoming an area driving the future. Therefore, more engineers specializing in micro- and/or nanoelectronics are needed in industry internationally. Globally, a distinct shift in nanoelectronic education has already been observed, where postgraduate coursework and part-coursework degrees in microelectronics and nanoelectronics are now being offered alongside the traditional research or coursework degrees in electronics or electrical engineering (light currents). However, in South Africa the situation is lagging; microelectronic or nanoelectronic specializations are offered either as honors degrees or as the research-based studies mentioned, with no dedicated coursework specialization at the master’s level. The Faculty of Engineering and the Built Environment of the University of Johannesburg (UJ) has, therefore, diversified the program and qualifications mix because of this need to teach nanoelectronics at the master’s level as well, via global partcoursework and a part-research method of delivery. However, approval for a new degree takes a number of years to be completed. Therefore, as an alternative route, nanoelectronic modules with some cross-disciplinary and multi-disciplinary modules are offered as continuing education programs (CEPs) at National Qualification Framework levels 8 and 9. The CEPs bear continuing Engineering Council of South Africa professional development credits, and can be credited as modules in the envisaged master’s degrees. The CEPs are delivered via an online approach, which develops student accessibility and brings about flexibility for students who are studying part-time. Enhanced accessibility and the fastgrowing level of internet access in Africa will allow the UJ to serve students both regionally and internationally. This paper explores the rationale for the chosen content of the CEPs and ultimately the proposed master’s degrees and discusses in detail the online mode of delivery and its benefits, as well as the approach taken to deliver courses according to this model, together with innovative opportunities.
- Full Text:
- Authors: Božanić, Mladen , Chaturvedi, Saurabh , Sinha, Saurabh
- Date: 2017
- Subjects: Nanoelectronics , Continuing education , Blackboard Learn platform
- Language: English
- Type: Conference proceedings
- Identifier: http://hdl.handle.net/10210/241998 , uj:24949 , Citation: Božanić, M., Chaturvedi, S. & Sinha, S. 2017. Re-inventing postgraduate level teaching and learning in nanoelectronics.
- Description: Abstract: In the world where technology changes almost daily, the field of microelectronics or nanoelectronics is becoming an area driving the future. Therefore, more engineers specializing in micro- and/or nanoelectronics are needed in industry internationally. Globally, a distinct shift in nanoelectronic education has already been observed, where postgraduate coursework and part-coursework degrees in microelectronics and nanoelectronics are now being offered alongside the traditional research or coursework degrees in electronics or electrical engineering (light currents). However, in South Africa the situation is lagging; microelectronic or nanoelectronic specializations are offered either as honors degrees or as the research-based studies mentioned, with no dedicated coursework specialization at the master’s level. The Faculty of Engineering and the Built Environment of the University of Johannesburg (UJ) has, therefore, diversified the program and qualifications mix because of this need to teach nanoelectronics at the master’s level as well, via global partcoursework and a part-research method of delivery. However, approval for a new degree takes a number of years to be completed. Therefore, as an alternative route, nanoelectronic modules with some cross-disciplinary and multi-disciplinary modules are offered as continuing education programs (CEPs) at National Qualification Framework levels 8 and 9. The CEPs bear continuing Engineering Council of South Africa professional development credits, and can be credited as modules in the envisaged master’s degrees. The CEPs are delivered via an online approach, which develops student accessibility and brings about flexibility for students who are studying part-time. Enhanced accessibility and the fastgrowing level of internet access in Africa will allow the UJ to serve students both regionally and internationally. This paper explores the rationale for the chosen content of the CEPs and ultimately the proposed master’s degrees and discusses in detail the online mode of delivery and its benefits, as well as the approach taken to deliver courses according to this model, together with innovative opportunities.
- Full Text:
Millimeter-wave passive bandpass filters
- Chaturvedi, Saurabh, Božanić, Mladen, Sinha, Saurabh
- Authors: Chaturvedi, Saurabh , Božanić, Mladen , Sinha, Saurabh
- Date: 2017
- Subjects: Bandpass filter (BPF) , Millimeter-wave (mm-wave) , Transmission line (TL)
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/238686 , uj:24497 , Citation: Chaturvedi, S., Božanić, M. & Sinha, S. 2017. Millimeter-wave passive bandpass filters.
- Description: Abstract: This paper presents a comprehensive review of millimeter-wave (mm-wave) passive bandpass filters (BPFs). A detailed discussion is provided on different topologies and architectures, performance comparison, design challenges, and process technologies. Passive BPFs offer the advantages of high operating frequency, good linearity, low noise figure (NF), and no power dissipation. Careful consideration of available process technologies is required for the implementation of high performance mm-wave circuits. Gallium arsenide (GaAs) and indium phosphide (InP) (group III-V) processes provide high cutoff frequencies (fT), good noise performance, and high quality on-chip passives. Complementary metal oxide semiconductor (CMOS) process has the prominent advantages of low cost, a high degree of integration, and high reliability, while silicon germanium bipolar CMOS (SiGe BiCMOS) process demonstrates high fT, a high level of integration, and better noise and power performance.
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- Authors: Chaturvedi, Saurabh , Božanić, Mladen , Sinha, Saurabh
- Date: 2017
- Subjects: Bandpass filter (BPF) , Millimeter-wave (mm-wave) , Transmission line (TL)
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/238686 , uj:24497 , Citation: Chaturvedi, S., Božanić, M. & Sinha, S. 2017. Millimeter-wave passive bandpass filters.
- Description: Abstract: This paper presents a comprehensive review of millimeter-wave (mm-wave) passive bandpass filters (BPFs). A detailed discussion is provided on different topologies and architectures, performance comparison, design challenges, and process technologies. Passive BPFs offer the advantages of high operating frequency, good linearity, low noise figure (NF), and no power dissipation. Careful consideration of available process technologies is required for the implementation of high performance mm-wave circuits. Gallium arsenide (GaAs) and indium phosphide (InP) (group III-V) processes provide high cutoff frequencies (fT), good noise performance, and high quality on-chip passives. Complementary metal oxide semiconductor (CMOS) process has the prominent advantages of low cost, a high degree of integration, and high reliability, while silicon germanium bipolar CMOS (SiGe BiCMOS) process demonstrates high fT, a high level of integration, and better noise and power performance.
- Full Text:
Millimeter-wave active bandpass filters
- Chaturvedi, Saurabh, Božanić, Mladen, Sinha, Saurabh
- Authors: Chaturvedi, Saurabh , Božanić, Mladen , Sinha, Saurabh
- Date: 2017
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/238699 , uj:24499 , Citation: Chaturvedi, S., Božanić, M. & Sinha, S. 2017. Millimeter-wave active bandpass filters.
- Description: Abstract: An exhaustive review of millimeter-wave (mm-wave) active bandpass filters (BPFs) is presented in this article. The details of various design approaches and realization techniques for the implementation of active BPFs are provided. The strengths, weaknesses, and design challenges of active BPFs are discussed. The available process technologies are investigated for the development of mm-wave filters. Active BPFs exhibit the merits of low loss, good outof- band rejection, good selectivity, and a high integration level. By applying loss compensation techniques, active BPFs are realized with low losses. The aim of this paper is to motivate research and development of high performance mm-wave BPFs, especially above the 60 GHz frequency band.
- Full Text:
- Authors: Chaturvedi, Saurabh , Božanić, Mladen , Sinha, Saurabh
- Date: 2017
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/238699 , uj:24499 , Citation: Chaturvedi, S., Božanić, M. & Sinha, S. 2017. Millimeter-wave active bandpass filters.
- Description: Abstract: An exhaustive review of millimeter-wave (mm-wave) active bandpass filters (BPFs) is presented in this article. The details of various design approaches and realization techniques for the implementation of active BPFs are provided. The strengths, weaknesses, and design challenges of active BPFs are discussed. The available process technologies are investigated for the development of mm-wave filters. Active BPFs exhibit the merits of low loss, good outof- band rejection, good selectivity, and a high integration level. By applying loss compensation techniques, active BPFs are realized with low losses. The aim of this paper is to motivate research and development of high performance mm-wave BPFs, especially above the 60 GHz frequency band.
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Overlay virtualized wireless sensor networks for application in industrial internet of things : a review
- Nkomo, Malvin, Hancke, Gerhard P., Abu-Mahfouz, Adnan M., Sinha, Saurabh, Onumanyi, Adeiza. J.
- Authors: Nkomo, Malvin , Hancke, Gerhard P. , Abu-Mahfouz, Adnan M. , Sinha, Saurabh , Onumanyi, Adeiza. J.
- Date: 2018
- Subjects: Internet of Things , WSN virtualization , Overlay WSN
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/278612 , uj:29901 , Citation: Nkomo, M. et al. 2018. Overlay virtualized wireless sensor networks for application in industrial internet of things : a review.
- Description: Abstract: In recent times, Wireless Sensor Networks (WSNs) are broadly applied in the Industrial Internet of Things (IIoT) in order to enhance the productivity and efficiency of existing and prospective manufacturing industries. In particular, an area of interest that concerns the use of WSNs in IIoT is the concept of sensor network virtualization and overlay networks. Both network virtualization and overlay networks are considered contemporary because they provide the capacity to create services and applications at the edge of existing virtual networks without changing the underlying infrastructure. This capability makes both network virtualization and overlay network services highly beneficial, particularly for the dynamic needs of IIoT based applications such as in smart industry applications, smart city, and smart home applications. Consequently, the study of both WSN virtualization and overlay networks has become highly patronized in the literature, leading to the growth and maturity of the research area. In line with this growth, this paper provides a review of the development made thus far concerning virtualized sensor networks, with emphasis on the application of overlay networks in IIoT. Principally, the process of virtualization in WSN is discussed along with its importance in IIoT applications. Different challenges in WSN are also presented along with possible solutions given by the use of virtualized WSNs. Further details are also presented concerning the use of overlay networks as the next step to supporting virtualization in shared sensor networks. Our discussion closes with an exposition of the existing challenges in the use of virtualized WSN for IIoT applications. In general, because overlay networks will be contributory to the future development and advancement of smart industrial and smart city applications, this review may be considered by researchers as a reference point for those particularly interested in the study of this growing field.
- Full Text:
- Authors: Nkomo, Malvin , Hancke, Gerhard P. , Abu-Mahfouz, Adnan M. , Sinha, Saurabh , Onumanyi, Adeiza. J.
- Date: 2018
- Subjects: Internet of Things , WSN virtualization , Overlay WSN
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/278612 , uj:29901 , Citation: Nkomo, M. et al. 2018. Overlay virtualized wireless sensor networks for application in industrial internet of things : a review.
- Description: Abstract: In recent times, Wireless Sensor Networks (WSNs) are broadly applied in the Industrial Internet of Things (IIoT) in order to enhance the productivity and efficiency of existing and prospective manufacturing industries. In particular, an area of interest that concerns the use of WSNs in IIoT is the concept of sensor network virtualization and overlay networks. Both network virtualization and overlay networks are considered contemporary because they provide the capacity to create services and applications at the edge of existing virtual networks without changing the underlying infrastructure. This capability makes both network virtualization and overlay network services highly beneficial, particularly for the dynamic needs of IIoT based applications such as in smart industry applications, smart city, and smart home applications. Consequently, the study of both WSN virtualization and overlay networks has become highly patronized in the literature, leading to the growth and maturity of the research area. In line with this growth, this paper provides a review of the development made thus far concerning virtualized sensor networks, with emphasis on the application of overlay networks in IIoT. Principally, the process of virtualization in WSN is discussed along with its importance in IIoT applications. Different challenges in WSN are also presented along with possible solutions given by the use of virtualized WSNs. Further details are also presented concerning the use of overlay networks as the next step to supporting virtualization in shared sensor networks. Our discussion closes with an exposition of the existing challenges in the use of virtualized WSN for IIoT applications. In general, because overlay networks will be contributory to the future development and advancement of smart industrial and smart city applications, this review may be considered by researchers as a reference point for those particularly interested in the study of this growing field.
- Full Text:
Emerging transistor technologies capable of terahertz amplification : a way to re-engineer terahertz radar sensors
- Božani, Mladen, Sinha, Saurabh
- Authors: Božani, Mladen , Sinha, Saurabh
- Date: 2019
- Subjects: Terahertz band; , Millimeter waves , InP
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/294938 , uj:32101 , Citation: Božani, M. & Sinha, S. 2019. Emerging transistor technologies capable of terahertz amplification : a way to re-engineer terahertz radar sensors. Sensors 2019, 19, 2454; doi:10.3390/s19112454
- Description: Abstract: Abstract: This paper reviews the state of emerging transistor technologies capable of terahertz amplification, as well as the state of transistor modeling as required in terahertz electronic circuit research. Commercial terahertz radar sensors of today are being built using bulky and expensive technologies such as Schottky diode detectors and lasers, as well as using some emerging detection methods. Meanwhile, a considerable amount of research effort has recently been invested in process development and modeling of transistor technologies capable of amplifying in the terahertz band. Indium phosphide (InP) transistors have been able to reach maximum oscillation frequency (fmax) values of over 1 THz for around a decade already, while silicon-germanium bipolar complementary metal-oxide semiconductor (BiCMOS) compatible heterojunction bipolar transistors have only recently crossed the fmax = 0.7 THz mark. While it seems that the InP technology could be the ultimate terahertz technology, according to the fmax and related metrics, the BiCMOS technology has the added advantage of lower cost and supporting a wider set of integrated component types. BiCMOS can thus be seen as an enabling factor for re-engineering of complete terahertz radar systems, for the first time fabricated as miniaturized monolithic integrated circuits. Rapid commercial deployment of monolithic terahertz radar chips, furthermore, depends on the accuracy of transistor modeling at these frequencies. Considerations such as fabrication and modeling of passives and antennas, as well as packaging of complete systems, are closely related to the two main contributions of this paper and are also reviewed here. Finally, this paper probes active terahertz circuits that have already been reported and that have the potential to be deployed in a re-engineered terahertz radar sensor system and attempts to predict future directions in re-engineering of monolithic radar sensors.
- Full Text:
- Authors: Božani, Mladen , Sinha, Saurabh
- Date: 2019
- Subjects: Terahertz band; , Millimeter waves , InP
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/294938 , uj:32101 , Citation: Božani, M. & Sinha, S. 2019. Emerging transistor technologies capable of terahertz amplification : a way to re-engineer terahertz radar sensors. Sensors 2019, 19, 2454; doi:10.3390/s19112454
- Description: Abstract: Abstract: This paper reviews the state of emerging transistor technologies capable of terahertz amplification, as well as the state of transistor modeling as required in terahertz electronic circuit research. Commercial terahertz radar sensors of today are being built using bulky and expensive technologies such as Schottky diode detectors and lasers, as well as using some emerging detection methods. Meanwhile, a considerable amount of research effort has recently been invested in process development and modeling of transistor technologies capable of amplifying in the terahertz band. Indium phosphide (InP) transistors have been able to reach maximum oscillation frequency (fmax) values of over 1 THz for around a decade already, while silicon-germanium bipolar complementary metal-oxide semiconductor (BiCMOS) compatible heterojunction bipolar transistors have only recently crossed the fmax = 0.7 THz mark. While it seems that the InP technology could be the ultimate terahertz technology, according to the fmax and related metrics, the BiCMOS technology has the added advantage of lower cost and supporting a wider set of integrated component types. BiCMOS can thus be seen as an enabling factor for re-engineering of complete terahertz radar systems, for the first time fabricated as miniaturized monolithic integrated circuits. Rapid commercial deployment of monolithic terahertz radar chips, furthermore, depends on the accuracy of transistor modeling at these frequencies. Considerations such as fabrication and modeling of passives and antennas, as well as packaging of complete systems, are closely related to the two main contributions of this paper and are also reviewed here. Finally, this paper probes active terahertz circuits that have already been reported and that have the potential to be deployed in a re-engineered terahertz radar sensor system and attempts to predict future directions in re-engineering of monolithic radar sensors.
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Ultra-compact capacitively loaded evanescent half-mode SIW filters for LTE applications
- Stander, Tinus, Sinha, Saurabh
- Authors: Stander, Tinus , Sinha, Saurabh
- Date: 2014
- Subjects: Printed circuit board processes , Waveguide filters , Resonators
- Type: Article
- Identifier: uj:4811 , ISSN 1759-0795 , http://hdl.handle.net/10210/12209
- Description: This paper presents a novel miniaturized substrate integrated waveguide filter by combining both half-mode resonators and capacitive loading on a conventional two-layer printed circuit board (PCB) process...
- Full Text:
- Authors: Stander, Tinus , Sinha, Saurabh
- Date: 2014
- Subjects: Printed circuit board processes , Waveguide filters , Resonators
- Type: Article
- Identifier: uj:4811 , ISSN 1759-0795 , http://hdl.handle.net/10210/12209
- Description: This paper presents a novel miniaturized substrate integrated waveguide filter by combining both half-mode resonators and capacitive loading on a conventional two-layer printed circuit board (PCB) process...
- Full Text:
Higher Education Leadership in the Era of the Fourth Industrial Revolution
- Du Preez, Jaco, Sinha, Saurabh
- Authors: Du Preez, Jaco , Sinha, Saurabh
- Date: 2020
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/434436 , uj:37611
- Description: Abstract: Please refer to full text to view abstract
- Full Text:
- Authors: Du Preez, Jaco , Sinha, Saurabh
- Date: 2020
- Language: English
- Type: Article
- Identifier: http://hdl.handle.net/10210/434436 , uj:37611
- Description: Abstract: Please refer to full text to view abstract
- Full Text:
Decentralizing emerging markets to prepare for Industry 4.0 : modernizing policies and the role of higher education
- Lambrechts, Wynand, Sinha, Saurabh, Marwala, Tshilidzi
- Authors: Lambrechts, Wynand , Sinha, Saurabh , Marwala, Tshilidzi
- Date: 2020
- Language: English
- Type: Book Chapter
- Identifier: http://hdl.handle.net/10210/460204 , uj:40944 , Citation: Lambrechts, W., Sinha, S. & Marwala, T. 2020. Decentralizing emerging markets to prepare for Industry 4.0 : modernizing policies and the role of higher education.
- Description: Abstract: This chapter investigates socioeconomic policies, technical focus, and academic necessities in core competencies and skills development to prepare emerging markets for the technological disruption of the Fourth Industrial Revolution (Industry 4.0 or 4IR). This chapter reviews the potential that Industry 4.0 has on creating sustainable work opportunities in emerging markets that have typically not benefitted equally (compared to developed markets) in earlier industrial revolutions. Industry 4.0 is unique in its ubiquity through the internet and allows remote participation in Industry 4.0. Emerging markets are urged to address challenges in adapting Industry 4.0 early and prepare for its maturation. Policy gaps in broadband connectivity and equal gender distribution in the information and communications industry are reviewed and presented in this chapter. Following this review, the role that higher education must play in skills development for Industry 4.0. Brazil, Russia, India, China, and South Africa have been identified as significant role-players in addressing policy gaps that could hinder Industry 4.0 development in emerging markets. Through Industry 4.0, a global shift towards a decentralized industry is occurring and this chapter additionally reviews the factors that influence this shift.
- Full Text:
- Authors: Lambrechts, Wynand , Sinha, Saurabh , Marwala, Tshilidzi
- Date: 2020
- Language: English
- Type: Book Chapter
- Identifier: http://hdl.handle.net/10210/460204 , uj:40944 , Citation: Lambrechts, W., Sinha, S. & Marwala, T. 2020. Decentralizing emerging markets to prepare for Industry 4.0 : modernizing policies and the role of higher education.
- Description: Abstract: This chapter investigates socioeconomic policies, technical focus, and academic necessities in core competencies and skills development to prepare emerging markets for the technological disruption of the Fourth Industrial Revolution (Industry 4.0 or 4IR). This chapter reviews the potential that Industry 4.0 has on creating sustainable work opportunities in emerging markets that have typically not benefitted equally (compared to developed markets) in earlier industrial revolutions. Industry 4.0 is unique in its ubiquity through the internet and allows remote participation in Industry 4.0. Emerging markets are urged to address challenges in adapting Industry 4.0 early and prepare for its maturation. Policy gaps in broadband connectivity and equal gender distribution in the information and communications industry are reviewed and presented in this chapter. Following this review, the role that higher education must play in skills development for Industry 4.0. Brazil, Russia, India, China, and South Africa have been identified as significant role-players in addressing policy gaps that could hinder Industry 4.0 development in emerging markets. Through Industry 4.0, a global shift towards a decentralized industry is occurring and this chapter additionally reviews the factors that influence this shift.
- Full Text:
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