Abstract
D.Ing. (Electrical and Electronic Engineering)
This thesis presents a series of analyses developed for several voltage source inverter
topologies, which are indispensable in aiding the understanding and the design of these
circuits. It describes the groundwork that is required for the development of custom design
software for voltage source inverters. The different circuits that can be designed by using
this program, are analyzed using conventional circuit analysis techniques. The equations
are used to simulate the switching behaviour and to specify the required or recommended
ratings of the main devices. The custom design program can be used to design three
different topologies of voltage source inverters: a) hard switching (snubberless) six pulse
bridge; b) hard switching (snubberless) six pulse bridge, equipped with a simple voltage
clamp; and c) soft switching (snubbed) six pulse bridge, equipped with a conventional
dissipative snubber circuit.
The snubberless behaviour of a voltage source inverter leg is both experimentally and
analytically investigated. Approximate equations are formulated which can be used to.
determine the peak ratings of the main devices in the inverter, taking the reverse recovery
of the freewheel diodes into account.
The snubberless behaviour of an inverter leg, equipped with a simple voltage clamp across
the dc link, is experimentally and theoretically investigated. Equations for design and
determining the required peak ratings of the main devices are developed. It is shown that
the simple voltage clamp can operate in two different modes, either as a fast discharging
or as a slow discharging voltage clamp and that the ranges of applicability of thetwo modes
of operation are different. Design rules for both modes of operation are presented.
In order to develop the design equations for a snubbed inverter leg a suitable topology had
to be identified first. A method for objectively comparing different inverter toplogies is
proposed in this thesis, according to which the minimum on- and off-states of the main
devices in the different topologies are compared for identical applications. This method is
used to compare four different snubbed voltage source inverter topologies both theoretically
and experimentally. As both methods indicate that the conventional snubber circuit
allows the highest PWM switching frequency of the uncontrolled snubber circuits, this
circuit is further investigated in its dissipative topology to develop the equations required
for simulation and for inclusion in the program.
The influence of snubber circuits on inductive inverter loads is also investigated. It is shown
that for normal snubber sizes the effect of dead time forms the larger part of the output
voltage distortion and that the effects of the snubber elements are normally of secondary
importance. The effect of asymmetry of a specific snubber circuit on inverter loads is
investigated and it is found that it introduces a de component in the output voltage.
Finally the application of linear snubbers to switches that exhibit tail-forming characteristics
is analyzed and optimized. The results allow the designer to minimize the total losses of
the converter by identifying the optimal snubber size. The theoretical results are experimentally
verified